anonymous
7 June 2010
A phase locked loop (PLL) is an electronic circuit that has a voltage driven oscillator that is constantly adjusted to match the frequency of an input signal. Operates by comparing the phase of a sample signal, usually the frequency-divided output of the RF oscillator, with a precision fixed reference frequency. The compared phase output then drives a control loop, which forces the RF oscillator frequency to be an exact multiple of the reference frequency. Used in audio for providing low jitter clocks for WC generators and in certain analog to digital converters.
(See Jitter)