Hi all!
I am reading about the use of JFET in compressors, and have ended up a bit confused.
Looking at the output characteristic graphs, where is the actual pinch-off point of a JFET?
- One of the books I am reading are talking about the Pinch-off point as the the point where Id is zero, ie. all the way to the left on the graphs. Another book says that the pinch-off point is where the Vds saturates and where we enter the active region. Confusion!
- Also, different sources also say different thing about the relation between Vds and Id. One book means that increasing the Vds (moving right on the graphs) decreases conductance and Id. Another source says the contrary. To me it clearly looks like following the Vds to the right (increasing Vds) also increases Id.
- And thirdly, when we speak about increased Vgs for JFETs, is that a more negative value or is it closer to zero? And a larger i/p, does that generate a more negative or more positive Vgs?
I would highly appreciate if someone could help me on this one.
Cheers!
/Thomas
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Thanks Audio Gaff! Yeah, you are probably right about the publi
Thanks Audio Gaff!
Yeah, you are probably right about the publishing date. One of the books is pretty old, soo...
But something that I'd love to get sorted out is the relation between Drain resistance and the Output characterisics graphs. Does this resistance (when kept in the ohmic region) increase if we follow the graphs to the right or to the left (down towards the 0 point)?
And, as I mentioned, something that really confuses me is the fact that an increased Vds actually (according to the books) decreases the Id, or as they call it, conductance. (still being in the ohmic region). But when I look at these graphs I see that the more Vds, the more Id.
I would be very happy if someone could explained this to me...
Cheers!
/Thomas
Well, Keep in mind of the publishing date of what you read. Man
Well, Keep in mind of the publishing date of what you read. Many on-going design and development in semiconductor processing has occured over the years.
It's been a while since I remember my JFET semicinductor theory, but as I understand it, As the gate is made more negative relative to the source, the P-region expands cutting down the size of the N-channel through which current can flow. A negative gate potential termed as the pinch-off voltage, is where conduction in the channel ceases. The control for the negative gate voltage lies between zero and gate to source cutoff voltage (Vgs-off). These voltages cause the gate source junction to be back biased.